Hello! I'm Michalis, I am a PhD student in Electrical and Electronic Engineering in Imperial College London, in the Circuits and Systems Group.
My research revolves around the application of formal methods in hardware design, looking for ways to increase the reliability of EDA tooling.
My research interests include theorem provers, hardware verification and fuzzing.

Publications

Michalis Pardalos, Alastair F. Donaldson, Emiliano Morini, Laura Pozzi and John Wickerson, "Who checks the checkers? Automatically finding bugs in C-to-RTL formal equivalence checkers," DVCon Europe 2024; Design and Verification Conference and Exhibition Europe, Munich, Germany, 2024, pp. 39-44.
DOI PDF
Michalis Pardalos, Yann Herklotz and John Wickerson, "Resource Sharing for Verified High-Level Synthesis," 2022 IEEE 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), New York City, NY, USA, 2022, pp. 1-6
DOI Artefact PDF

Michalis Pardalos, "Who checks the checkers? Steps towards reliable equivalence checking", 2024 Programming Language Design and Implementation, Student Research Competition
Poster

Publications

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